 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| ESDALC6V1-1BM2 Single line low capacitance TransilTM for ESD protection Features Single line low capacitance Transil diode Bidirectional ESD protection ESD protection > 30 kV (IEC 61000-4-2 contact discharge) Breakdown Voltage VBR = 6.1 V min. Low diode capacitance (22 pF typ. at 0 V) Low leakage current: < 100 nA at 3 V Very small PCB area: 0.6 mm2 Leadfree package Figure 1. Functional diagram SOD882 Benefits High ESD protection level High integration Suitable for high density boards I/O1 Complies with the following standards IEC 61000-4-2 level 4 - 15 kV (air discharge) - 8 kV (contact discharge) MIL STD 883G - Method 3015-7: class 3B - Human body model I/O2 Applications Where transient overvoltage protection in ESD sensitive equipment is required, such as: Description The ESDALC6V1-1BM2 is a bidirectional single line TVS diode designed to protect the datalines or other I/O ports against ESD transients. The device is ideal for applications where both reduced line capacitance and board space saving are required. Computers Printers Communication systems Cellular phone handsets and accessories Video equipment TM: Transil is a trademark of STMicroelectronics April 2008 Rev 2 1/10 www.st.com Characteristics ESDALC6V1-1BM2 1 Characteristics Table 1. Symbol VPP(1) PPP(1) IPP Tj Tstg TL TOP Absolute maximum ratings (Tamb = 25 C) Parameter Peak pulse voltage (IEC 61000-4-2 contact discharge) Peak pulse power dissipation (8/20 s) Repetitive peak pulse current (8/20 s) Junction temperature Storage temperature range Maximum lead temperature for soldering during 10 s Operating temperature range Tj initial = Tamb Value 30 140 9 125 - 55 to + 150 260 - 40 to + 125 Unit kV W A C C C C 1. For a surge greater than the maximum values, the diode will fail in short-circuit. Table 2. Symbol VRM VBR VCL IRM IPP VF Electrical characteristics (Tamb = 25 C) Parameter Stand-of voltage Breakdown voltage Clamping voltage Leakage current @ VRM Peak pulse current Forward voltage drop VBR @ IR IRM @ VRM max. mA 1 nA 100 V 3 Rd typ. 0.65 T max. 10-4/C 2.5 C@0 V Bias typ. pF 22 VBR VRM IR IRM IRM IR VRM VBR V I Order code min. V max. V 8.0 ESDALC6V1-1BM2 6.1 2/10 ESDALC6V1-1BM2 Characteristics Figure 2. Relative variation of peak pulse power versus initial junction temperature Figure 3. Peak pulse power versus exponential pulse duration PPP[Tj initial] / PPP[Tj initial=25C) 1.1 1.0 0.9 0.8 0.7 0.6 100 0.5 0.4 0.3 0.2 0.1 0.0 0 25 50 75 100 125 150 1000 PPP(W) Tj initial=25C Tj(C) 10 1 tp(s) 10 100 Figure 4. Clamping voltage versus peak pulse current (typical values) Figure 5. Junction capacitance versus reverse voltage applied (typical values) IPP(A) 100.0 Tj initial=25C C(pF) 25 F=1MHz VOSC=30mVRMS Tj=25C 20 10.0 15 10 1.0 5 VCL(V) 0.1 0 5 10 15 20 25 30 35 40 0 0 1 2 VLINE(V) 3 4 5 Figure 6. Relative variation of leakage current versus junction temperature (typical values) Figure 7. ESD response to IEC 61000-4-2 (+15 kV air discharge) on each channel IR[Tj] / IR[Tj=25C] 100 VR=3V 10 Tj(C) 1 25 50 75 100 125 150 3/10 Ordering information scheme ESDALC6V1-1BM2 Figure 8. ESD response to IEC 61000-4-2 (-15 kV air discharge) on each channel Figure 9. S21 attenuation measurement result dB 0.00 -3 dB - 10.00 - 20.00 - 30.00 F (Hz) - 40.00 100.0k 1.0M 10.0M 100.0M 1.0G 2 Ordering information scheme Figure 10. Ordering information scheme ESDA LC 6V1 - 1 B M2 ESD Array Low Capacitance Breakdown Voltage 6V1 = 6.1 Volts min Number of lines Directional B = Bi-directional Package M2 = SOD882 4/10 ESDALC6V1-1BM2 Package information 3 Package information Epoxy meets UL94, V0 In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Table 3. SOD882 dimensions TOP VIEW Dimensions Ref. E D INDEX AREA (D/2 x E/2) Millimeters Min. Typ. 0.47 Max. Min. Inches Typ. Max. A SIDE VIEW 0.40 0.00 0.20 0.20 0.50 0.016 0.019 0.020 0.05 0.000 0.002 A1 A1 A b1 b2 0.25 0.25 1.00 0.60 0.65 0.30 0.008 0.010 0.012 0.30 0.008 0.010 0.012 0.039 0.024 0.026 0.55 0.018 0.020 0.022 0.55 0.018 0.020 0.022 BOTTOM VIEW b1 INDEX AREA (D/2 x E/2) b2 D E L2 L1 OPTIONAL PIN # 1 ID e L1 0.45 0.45 0.50 0.50 e L2 Note: Product marking may be rotated by 90 for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. Figure 11. Footprint (dimensions in mm) Figure 12. Marking 0.55 0.55 0.50 Pin1 P Pin 2 0.40 5/10 Package information Figure 13. Tape and reel specifications ESDALC6V1-1BM2 2.0 0.05 0.20 0.05 4.0 0.1 O 1.55 0.05 1.75 0.1 1.10 0.05 P P 3.5 - 0.05 0.66 0.05 (C-PAK) 0.55 0.1 (3M) All dimensions in mm 8.0 0.3 0.68 0.05 User direction of unreeling P P P 2.0 0.1 P P 6/10 ESDALC6V1-1BM2 Recommendation on PCB assembly 4 4.1 Recommendation on PCB assembly Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 14. Stencil opening dimensions L T W b) General design rule Stencil thickness (T) = 75 ~ 125 m W Aspect Ratio = ---- 1.5 T LxW Aspect Area = --------------------------- 0.66 2T ( L + W ) 2. Reference design a) b) Stencil opening thickness: 100 m Stencil opening for leads: Opening to footprint ratio - between 60% and 65%. Figure 15. Recommended stencil windows position Package footprint Lead footprint on PCB Lead footprint on PCB Stencil window position 0.39 mm Stencil window position 0.45 mm 0.05 mm 0.05 mm 4.2 Solder paste 1. 2. 3. 4. Halide-free flux qualification ROL0 according to ANSI/J-STD-004. "No clean" solder paste is recommended. Offers a high tack force to resist component movement during high speed Solder paste with fine particles: powder particle size is 20-45 m. 7/10 Recommendation on PCB assembly ESDALC6V1-1BM2 4.3 Placement 1. 2. 3. 4. Manual positioning is not recommended. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering Standard tolerance of 0.05 mm is recommended. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. 5. 6. 4.4 PCB design preference 1. 2. To control the solder paste amount, the closed via is recommended instead of open vias. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. 4.5 Reflow profile Figure 16. ST ECOPACK recommended soldering reflow profile for PCB mounting Temperature (C) 260C max 255C 220C 180C 125 C 2C/s recommended 2C/s recommended 6C/s max 6C/s max 3C/s max 3C/s max 0 0 1 2 3 4 5 10-30 sec 90 to 150 sec 90 sec max 6 7 Time (min) Note: Minimize air convection currents in the reflow oven to avoid component movement. 8/10 ESDALC6V1-1BM2 Ordering information 5 Ordering information Table 4. Ordering information Marking P(1) Package SOD882 Weight 0.89 mg Base qty 3000 Delivery mode Tape and reel Order code ESDALC6V1-1BM2 1. The marking can be rotated by 90 to diferentiate assembly location 6 Revision history Table 5. Date 11-Jan-2007 1-Apr-2007 Document revision history Revision 1 2 Initial release. Reformatted to currrent standards. Added Figure 12.: Marking. Updated Figure 13.: Tape and reel specifications. Added Section 4: Recommendation on PCB assembly. Changes 9/10 ESDALC6V1-1BM2 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 10/10 |
Price & Availability of ESDALC6V1-1BM2
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |